a.out.go

Documentation: cmd/internal/obj/ppc64

     1  // cmd/9c/9.out.h from Vita Nuova.
     2  //
     3  //	Copyright © 1994-1999 Lucent Technologies Inc.  All rights reserved.
     4  //	Portions Copyright © 1995-1997 C H Forsyth (forsyth@terzarima.net)
     5  //	Portions Copyright © 1997-1999 Vita Nuova Limited
     6  //	Portions Copyright © 2000-2008 Vita Nuova Holdings Limited (www.vitanuova.com)
     7  //	Portions Copyright © 2004,2006 Bruce Ellis
     8  //	Portions Copyright © 2005-2007 C H Forsyth (forsyth@terzarima.net)
     9  //	Revisions Copyright © 2000-2008 Lucent Technologies Inc. and others
    10  //	Portions Copyright © 2009 The Go Authors. All rights reserved.
    11  //
    12  // Permission is hereby granted, free of charge, to any person obtaining a copy
    13  // of this software and associated documentation files (the "Software"), to deal
    14  // in the Software without restriction, including without limitation the rights
    15  // to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
    16  // copies of the Software, and to permit persons to whom the Software is
    17  // furnished to do so, subject to the following conditions:
    18  //
    19  // The above copyright notice and this permission notice shall be included in
    20  // all copies or substantial portions of the Software.
    21  //
    22  // THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
    23  // IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
    24  // FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL THE
    25  // AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
    26  // LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
    27  // OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
    28  // THE SOFTWARE.
    29  
    30  package ppc64
    31  
    32  import "cmd/internal/obj"
    33  
    34  //go:generate go run ../stringer.go -i $GOFILE -o anames.go -p ppc64
    35  
    36  /*
    37   * powerpc 64
    38   */
    39  const (
    40  	NSNAME = 8
    41  	NSYM   = 50
    42  	NREG   = 32 /* number of general registers */
    43  	NFREG  = 32 /* number of floating point registers */
    44  )
    45  
    46  const (
    47  	/* RBasePPC64 = 4096 */
    48  	/* R0=4096 ... R31=4127 */
    49  	REG_R0 = obj.RBasePPC64 + iota
    50  	REG_R1
    51  	REG_R2
    52  	REG_R3
    53  	REG_R4
    54  	REG_R5
    55  	REG_R6
    56  	REG_R7
    57  	REG_R8
    58  	REG_R9
    59  	REG_R10
    60  	REG_R11
    61  	REG_R12
    62  	REG_R13
    63  	REG_R14
    64  	REG_R15
    65  	REG_R16
    66  	REG_R17
    67  	REG_R18
    68  	REG_R19
    69  	REG_R20
    70  	REG_R21
    71  	REG_R22
    72  	REG_R23
    73  	REG_R24
    74  	REG_R25
    75  	REG_R26
    76  	REG_R27
    77  	REG_R28
    78  	REG_R29
    79  	REG_R30
    80  	REG_R31
    81  
    82  	/* F0=4128 ... F31=4159 */
    83  	REG_F0
    84  	REG_F1
    85  	REG_F2
    86  	REG_F3
    87  	REG_F4
    88  	REG_F5
    89  	REG_F6
    90  	REG_F7
    91  	REG_F8
    92  	REG_F9
    93  	REG_F10
    94  	REG_F11
    95  	REG_F12
    96  	REG_F13
    97  	REG_F14
    98  	REG_F15
    99  	REG_F16
   100  	REG_F17
   101  	REG_F18
   102  	REG_F19
   103  	REG_F20
   104  	REG_F21
   105  	REG_F22
   106  	REG_F23
   107  	REG_F24
   108  	REG_F25
   109  	REG_F26
   110  	REG_F27
   111  	REG_F28
   112  	REG_F29
   113  	REG_F30
   114  	REG_F31
   115  
   116  	/* V0=4160 ... V31=4191 */
   117  	REG_V0
   118  	REG_V1
   119  	REG_V2
   120  	REG_V3
   121  	REG_V4
   122  	REG_V5
   123  	REG_V6
   124  	REG_V7
   125  	REG_V8
   126  	REG_V9
   127  	REG_V10
   128  	REG_V11
   129  	REG_V12
   130  	REG_V13
   131  	REG_V14
   132  	REG_V15
   133  	REG_V16
   134  	REG_V17
   135  	REG_V18
   136  	REG_V19
   137  	REG_V20
   138  	REG_V21
   139  	REG_V22
   140  	REG_V23
   141  	REG_V24
   142  	REG_V25
   143  	REG_V26
   144  	REG_V27
   145  	REG_V28
   146  	REG_V29
   147  	REG_V30
   148  	REG_V31
   149  
   150  	/* VS0=4192 ... VS63=4255 */
   151  	REG_VS0
   152  	REG_VS1
   153  	REG_VS2
   154  	REG_VS3
   155  	REG_VS4
   156  	REG_VS5
   157  	REG_VS6
   158  	REG_VS7
   159  	REG_VS8
   160  	REG_VS9
   161  	REG_VS10
   162  	REG_VS11
   163  	REG_VS12
   164  	REG_VS13
   165  	REG_VS14
   166  	REG_VS15
   167  	REG_VS16
   168  	REG_VS17
   169  	REG_VS18
   170  	REG_VS19
   171  	REG_VS20
   172  	REG_VS21
   173  	REG_VS22
   174  	REG_VS23
   175  	REG_VS24
   176  	REG_VS25
   177  	REG_VS26
   178  	REG_VS27
   179  	REG_VS28
   180  	REG_VS29
   181  	REG_VS30
   182  	REG_VS31
   183  	REG_VS32
   184  	REG_VS33
   185  	REG_VS34
   186  	REG_VS35
   187  	REG_VS36
   188  	REG_VS37
   189  	REG_VS38
   190  	REG_VS39
   191  	REG_VS40
   192  	REG_VS41
   193  	REG_VS42
   194  	REG_VS43
   195  	REG_VS44
   196  	REG_VS45
   197  	REG_VS46
   198  	REG_VS47
   199  	REG_VS48
   200  	REG_VS49
   201  	REG_VS50
   202  	REG_VS51
   203  	REG_VS52
   204  	REG_VS53
   205  	REG_VS54
   206  	REG_VS55
   207  	REG_VS56
   208  	REG_VS57
   209  	REG_VS58
   210  	REG_VS59
   211  	REG_VS60
   212  	REG_VS61
   213  	REG_VS62
   214  	REG_VS63
   215  
   216  	REG_CR0
   217  	REG_CR1
   218  	REG_CR2
   219  	REG_CR3
   220  	REG_CR4
   221  	REG_CR5
   222  	REG_CR6
   223  	REG_CR7
   224  
   225  	REG_MSR
   226  	REG_FPSCR
   227  	REG_CR
   228  
   229  	REG_SPECIAL = REG_CR0
   230  
   231  	REG_SPR0 = obj.RBasePPC64 + 1024 // first of 1024 registers
   232  	REG_DCR0 = obj.RBasePPC64 + 2048 // first of 1024 registers
   233  
   234  	REG_XER = REG_SPR0 + 1
   235  	REG_LR  = REG_SPR0 + 8
   236  	REG_CTR = REG_SPR0 + 9
   237  
   238  	REGZERO = REG_R0 /* set to zero */
   239  	REGSP   = REG_R1
   240  	REGSB   = REG_R2
   241  	REGRET  = REG_R3
   242  	REGARG  = -1      /* -1 disables passing the first argument in register */
   243  	REGRT1  = REG_R3  /* reserved for runtime, duffzero and duffcopy */
   244  	REGRT2  = REG_R4  /* reserved for runtime, duffcopy */
   245  	REGMIN  = REG_R7  /* register variables allocated from here to REGMAX */
   246  	REGCTXT = REG_R11 /* context for closures */
   247  	REGTLS  = REG_R13 /* C ABI TLS base pointer */
   248  	REGMAX  = REG_R27
   249  	REGEXT  = REG_R30 /* external registers allocated from here down */
   250  	REGG    = REG_R30 /* G */
   251  	REGTMP  = REG_R31 /* used by the linker */
   252  	FREGRET = REG_F0
   253  	FREGMIN = REG_F17 /* first register variable */
   254  	FREGMAX = REG_F26 /* last register variable for 9g only */
   255  	FREGEXT = REG_F26 /* first external register */
   256  )
   257  
   258  // OpenPOWER ABI for Linux Supplement Power Architecture 64-Bit ELF V2 ABI
   259  // https://openpowerfoundation.org/?resource_lib=64-bit-elf-v2-abi-specification-power-architecture
   260  var PPC64DWARFRegisters = map[int16]int16{}
   261  
   262  func init() {
   263  	// f assigns dwarfregister[from:to] = (base):(to-from+base)
   264  	f := func(from, to, base int16) {
   265  		for r := int16(from); r <= to; r++ {
   266  			PPC64DWARFRegisters[r] = r - from + base
   267  		}
   268  	}
   269  	f(REG_R0, REG_R31, 0)
   270  	f(REG_F0, REG_F31, 32)
   271  	f(REG_V0, REG_V31, 77)
   272  	f(REG_CR0, REG_CR7, 68)
   273  
   274  	f(REG_VS0, REG_VS31, 32)  // overlaps F0-F31
   275  	f(REG_VS32, REG_VS63, 77) // overlaps V0-V31
   276  	PPC64DWARFRegisters[REG_LR] = 65
   277  	PPC64DWARFRegisters[REG_CTR] = 66
   278  	PPC64DWARFRegisters[REG_XER] = 76
   279  }
   280  
   281  /*
   282   * GENERAL:
   283   *
   284   * compiler allocates R3 up as temps
   285   * compiler allocates register variables R7-R27
   286   * compiler allocates external registers R30 down
   287   *
   288   * compiler allocates register variables F17-F26
   289   * compiler allocates external registers F26 down
   290   */
   291  const (
   292  	BIG = 32768 - 8
   293  )
   294  
   295  const (
   296  	/* mark flags */
   297  	LABEL   = 1 << 0
   298  	LEAF    = 1 << 1
   299  	FLOAT   = 1 << 2
   300  	BRANCH  = 1 << 3
   301  	LOAD    = 1 << 4
   302  	FCMP    = 1 << 5
   303  	SYNC    = 1 << 6
   304  	LIST    = 1 << 7
   305  	FOLL    = 1 << 8
   306  	NOSCHED = 1 << 9
   307  )
   308  
   309  // Values for use in branch instruction BC
   310  // BC B0,BI,label
   311  // BO is type of branch + likely bits described below
   312  // BI is CR value + branch type
   313  // ex: BEQ CR2,label is BC 12,10,label
   314  //   12 = BO_BCR
   315  //   10 = BI_CR2 + BI_EQ
   316  
   317  const (
   318  	BI_CR0 = 0
   319  	BI_CR1 = 4
   320  	BI_CR2 = 8
   321  	BI_CR3 = 12
   322  	BI_CR4 = 16
   323  	BI_CR5 = 20
   324  	BI_CR6 = 24
   325  	BI_CR7 = 28
   326  	BI_LT  = 0
   327  	BI_GT  = 1
   328  	BI_EQ  = 2
   329  	BI_OVF = 3
   330  )
   331  
   332  // Values for the BO field.  Add the branch type to
   333  // the likely bits, if a likely setting is known.
   334  // If branch likely or unlikely is not known, don't set it.
   335  // e.g. branch on cr+likely = 15
   336  
   337  const (
   338  	BO_BCTR     = 16 // branch on ctr value
   339  	BO_BCR      = 12 // branch on cr value
   340  	BO_BCRBCTR  = 8  // branch on ctr and cr value
   341  	BO_NOTBCR   = 4  // branch on not cr value
   342  	BO_UNLIKELY = 2  // value for unlikely
   343  	BO_LIKELY   = 3  // value for likely
   344  )
   345  
   346  // Bit settings from the CR
   347  
   348  const (
   349  	C_COND_LT = iota // 0 result is negative
   350  	C_COND_GT        // 1 result is positive
   351  	C_COND_EQ        // 2 result is zero
   352  	C_COND_SO        // 3 summary overflow or FP compare w/ NaN
   353  )
   354  
   355  const (
   356  	C_NONE = iota
   357  	C_REG
   358  	C_FREG
   359  	C_VREG
   360  	C_VSREG
   361  	C_CREG
   362  	C_SPR /* special processor register */
   363  	C_ZCON
   364  	C_SCON   /* 16 bit signed */
   365  	C_UCON   /* 32 bit signed, low 16 bits 0 */
   366  	C_ADDCON /* -0x8000 <= v < 0 */
   367  	C_ANDCON /* 0 < v <= 0xFFFF */
   368  	C_LCON   /* other 32 */
   369  	C_DCON   /* other 64 (could subdivide further) */
   370  	C_SACON  /* $n(REG) where n <= int16 */
   371  	C_LACON  /* $n(REG) where int16 < n <= int32 */
   372  	C_DACON  /* $n(REG) where int32 < n */
   373  	C_SBRA
   374  	C_LBRA
   375  	C_LBRAPIC
   376  	C_ZOREG // conjecture: either (1) register + zeroed offset, or (2) "R0" implies zero or C_REG
   377  	C_SOREG // D/DS form memory operation
   378  	C_LOREG // 32 bit addis + D/DS-form memory operation
   379  	C_FPSCR
   380  	C_XER
   381  	C_LR
   382  	C_CTR
   383  	C_ANY
   384  	C_GOK
   385  	C_ADDR
   386  	C_TLS_LE
   387  	C_TLS_IE
   388  	C_TEXTSIZE
   389  
   390  	C_NCLASS /* must be the last */
   391  )
   392  
   393  const (
   394  	AADD = obj.ABasePPC64 + obj.A_ARCHSPECIFIC + iota
   395  	AADDCC
   396  	AADDIS
   397  	AADDV
   398  	AADDVCC
   399  	AADDC
   400  	AADDCCC
   401  	AADDCV
   402  	AADDCVCC
   403  	AADDME
   404  	AADDMECC
   405  	AADDMEVCC
   406  	AADDMEV
   407  	AADDE
   408  	AADDECC
   409  	AADDEVCC
   410  	AADDEV
   411  	AADDZE
   412  	AADDZECC
   413  	AADDZEVCC
   414  	AADDZEV
   415  	AADDEX
   416  	AAND
   417  	AANDCC
   418  	AANDN
   419  	AANDNCC
   420  	AANDISCC
   421  	ABC
   422  	ABCL
   423  	ABEQ
   424  	ABGE // not LT = G/E/U
   425  	ABGT
   426  	ABLE // not GT = L/E/U
   427  	ABLT
   428  	ABNE // not EQ = L/G/U
   429  	ABVC // Unordered-clear
   430  	ABVS // Unordered-set
   431  	ACMP
   432  	ACMPU
   433  	ACMPEQB
   434  	ACNTLZW
   435  	ACNTLZWCC
   436  	ACRAND
   437  	ACRANDN
   438  	ACREQV
   439  	ACRNAND
   440  	ACRNOR
   441  	ACROR
   442  	ACRORN
   443  	ACRXOR
   444  	ADIVW
   445  	ADIVWCC
   446  	ADIVWVCC
   447  	ADIVWV
   448  	ADIVWU
   449  	ADIVWUCC
   450  	ADIVWUVCC
   451  	ADIVWUV
   452  	AMODUD
   453  	AMODUW
   454  	AMODSD
   455  	AMODSW
   456  	AEQV
   457  	AEQVCC
   458  	AEXTSB
   459  	AEXTSBCC
   460  	AEXTSH
   461  	AEXTSHCC
   462  	AFABS
   463  	AFABSCC
   464  	AFADD
   465  	AFADDCC
   466  	AFADDS
   467  	AFADDSCC
   468  	AFCMPO
   469  	AFCMPU
   470  	AFCTIW
   471  	AFCTIWCC
   472  	AFCTIWZ
   473  	AFCTIWZCC
   474  	AFDIV
   475  	AFDIVCC
   476  	AFDIVS
   477  	AFDIVSCC
   478  	AFMADD
   479  	AFMADDCC
   480  	AFMADDS
   481  	AFMADDSCC
   482  	AFMOVD
   483  	AFMOVDCC
   484  	AFMOVDU
   485  	AFMOVS
   486  	AFMOVSU
   487  	AFMOVSX
   488  	AFMOVSZ
   489  	AFMSUB
   490  	AFMSUBCC
   491  	AFMSUBS
   492  	AFMSUBSCC
   493  	AFMUL
   494  	AFMULCC
   495  	AFMULS
   496  	AFMULSCC
   497  	AFNABS
   498  	AFNABSCC
   499  	AFNEG
   500  	AFNEGCC
   501  	AFNMADD
   502  	AFNMADDCC
   503  	AFNMADDS
   504  	AFNMADDSCC
   505  	AFNMSUB
   506  	AFNMSUBCC
   507  	AFNMSUBS
   508  	AFNMSUBSCC
   509  	AFRSP
   510  	AFRSPCC
   511  	AFSUB
   512  	AFSUBCC
   513  	AFSUBS
   514  	AFSUBSCC
   515  	AISEL
   516  	AMOVMW
   517  	ALBAR
   518  	ALHAR
   519  	ALSW
   520  	ALWAR
   521  	ALWSYNC
   522  	AMOVDBR
   523  	AMOVWBR
   524  	AMOVB
   525  	AMOVBU
   526  	AMOVBZ
   527  	AMOVBZU
   528  	AMOVH
   529  	AMOVHBR
   530  	AMOVHU
   531  	AMOVHZ
   532  	AMOVHZU
   533  	AMOVW
   534  	AMOVWU
   535  	AMOVFL
   536  	AMOVCRFS
   537  	AMTFSB0
   538  	AMTFSB0CC
   539  	AMTFSB1
   540  	AMTFSB1CC
   541  	AMULHW
   542  	AMULHWCC
   543  	AMULHWU
   544  	AMULHWUCC
   545  	AMULLW
   546  	AMULLWCC
   547  	AMULLWVCC
   548  	AMULLWV
   549  	ANAND
   550  	ANANDCC
   551  	ANEG
   552  	ANEGCC
   553  	ANEGVCC
   554  	ANEGV
   555  	ANOR
   556  	ANORCC
   557  	AOR
   558  	AORCC
   559  	AORN
   560  	AORNCC
   561  	AORIS
   562  	AREM
   563  	AREMU
   564  	ARFI
   565  	ARLWMI
   566  	ARLWMICC
   567  	ARLWNM
   568  	ARLWNMCC
   569  	ACLRLSLWI
   570  	ASLW
   571  	ASLWCC
   572  	ASRW
   573  	ASRAW
   574  	ASRAWCC
   575  	ASRWCC
   576  	ASTBCCC
   577  	ASTHCCC
   578  	ASTSW
   579  	ASTWCCC
   580  	ASUB
   581  	ASUBCC
   582  	ASUBVCC
   583  	ASUBC
   584  	ASUBCCC
   585  	ASUBCV
   586  	ASUBCVCC
   587  	ASUBME
   588  	ASUBMECC
   589  	ASUBMEVCC
   590  	ASUBMEV
   591  	ASUBV
   592  	ASUBE
   593  	ASUBECC
   594  	ASUBEV
   595  	ASUBEVCC
   596  	ASUBZE
   597  	ASUBZECC
   598  	ASUBZEVCC
   599  	ASUBZEV
   600  	ASYNC
   601  	AXOR
   602  	AXORCC
   603  	AXORIS
   604  
   605  	ADCBF
   606  	ADCBI
   607  	ADCBST
   608  	ADCBT
   609  	ADCBTST
   610  	ADCBZ
   611  	AECIWX
   612  	AECOWX
   613  	AEIEIO
   614  	AICBI
   615  	AISYNC
   616  	APTESYNC
   617  	ATLBIE
   618  	ATLBIEL
   619  	ATLBSYNC
   620  	ATW
   621  
   622  	ASYSCALL
   623  	AWORD
   624  
   625  	ARFCI
   626  
   627  	AFCPSGN
   628  	AFCPSGNCC
   629  	/* optional on 32-bit */
   630  	AFRES
   631  	AFRESCC
   632  	AFRIM
   633  	AFRIMCC
   634  	AFRIP
   635  	AFRIPCC
   636  	AFRIZ
   637  	AFRIZCC
   638  	AFRIN
   639  	AFRINCC
   640  	AFRSQRTE
   641  	AFRSQRTECC
   642  	AFSEL
   643  	AFSELCC
   644  	AFSQRT
   645  	AFSQRTCC
   646  	AFSQRTS
   647  	AFSQRTSCC
   648  
   649  	/* 64-bit */
   650  
   651  	ACNTLZD
   652  	ACNTLZDCC
   653  	ACMPW /* CMP with L=0 */
   654  	ACMPWU
   655  	ACMPB
   656  	AFTDIV
   657  	AFTSQRT
   658  	ADIVD
   659  	ADIVDCC
   660  	ADIVDE
   661  	ADIVDECC
   662  	ADIVDEU
   663  	ADIVDEUCC
   664  	ADIVDVCC
   665  	ADIVDV
   666  	ADIVDU
   667  	ADIVDUCC
   668  	ADIVDUVCC
   669  	ADIVDUV
   670  	AEXTSW
   671  	AEXTSWCC
   672  	/* AFCFIW; AFCFIWCC */
   673  	AFCFID
   674  	AFCFIDCC
   675  	AFCFIDU
   676  	AFCFIDUCC
   677  	AFCFIDS
   678  	AFCFIDSCC
   679  	AFCTID
   680  	AFCTIDCC
   681  	AFCTIDZ
   682  	AFCTIDZCC
   683  	ALDAR
   684  	AMOVD
   685  	AMOVDU
   686  	AMOVWZ
   687  	AMOVWZU
   688  	AMULHD
   689  	AMULHDCC
   690  	AMULHDU
   691  	AMULHDUCC
   692  	AMULLD
   693  	AMULLDCC
   694  	AMULLDVCC
   695  	AMULLDV
   696  	ARFID
   697  	ARLDMI
   698  	ARLDMICC
   699  	ARLDIMI
   700  	ARLDIMICC
   701  	ARLDC
   702  	ARLDCCC
   703  	ARLDCR
   704  	ARLDCRCC
   705  	ARLDICR
   706  	ARLDICRCC
   707  	ARLDCL
   708  	ARLDCLCC
   709  	ARLDICL
   710  	ARLDICLCC
   711  	ARLDIC
   712  	ARLDICCC
   713  	ACLRLSLDI
   714  	AROTL
   715  	AROTLW
   716  	ASLBIA
   717  	ASLBIE
   718  	ASLBMFEE
   719  	ASLBMFEV
   720  	ASLBMTE
   721  	ASLD
   722  	ASLDCC
   723  	ASRD
   724  	ASRAD
   725  	ASRADCC
   726  	ASRDCC
   727  	AEXTSWSLI
   728  	AEXTSWSLICC
   729  	ASTDCCC
   730  	ATD
   731  
   732  	/* 64-bit pseudo operation */
   733  	ADWORD
   734  	AREMD
   735  	AREMDU
   736  
   737  	/* more 64-bit operations */
   738  	AHRFID
   739  	APOPCNTD
   740  	APOPCNTW
   741  	APOPCNTB
   742  	ACNTTZW
   743  	ACNTTZWCC
   744  	ACNTTZD
   745  	ACNTTZDCC
   746  	ACOPY
   747  	APASTECC
   748  	ADARN
   749  	ALDMX
   750  	AMADDHD
   751  	AMADDHDU
   752  	AMADDLD
   753  
   754  	/* Vector */
   755  	ALV
   756  	ALVEBX
   757  	ALVEHX
   758  	ALVEWX
   759  	ALVX
   760  	ALVXL
   761  	ALVSL
   762  	ALVSR
   763  	ASTV
   764  	ASTVEBX
   765  	ASTVEHX
   766  	ASTVEWX
   767  	ASTVX
   768  	ASTVXL
   769  	AVAND
   770  	AVANDC
   771  	AVNAND
   772  	AVOR
   773  	AVORC
   774  	AVNOR
   775  	AVXOR
   776  	AVEQV
   777  	AVADDUM
   778  	AVADDUBM
   779  	AVADDUHM
   780  	AVADDUWM
   781  	AVADDUDM
   782  	AVADDUQM
   783  	AVADDCU
   784  	AVADDCUQ
   785  	AVADDCUW
   786  	AVADDUS
   787  	AVADDUBS
   788  	AVADDUHS
   789  	AVADDUWS
   790  	AVADDSS
   791  	AVADDSBS
   792  	AVADDSHS
   793  	AVADDSWS
   794  	AVADDE
   795  	AVADDEUQM
   796  	AVADDECUQ
   797  	AVSUBUM
   798  	AVSUBUBM
   799  	AVSUBUHM
   800  	AVSUBUWM
   801  	AVSUBUDM
   802  	AVSUBUQM
   803  	AVSUBCU
   804  	AVSUBCUQ
   805  	AVSUBCUW
   806  	AVSUBUS
   807  	AVSUBUBS
   808  	AVSUBUHS
   809  	AVSUBUWS
   810  	AVSUBSS
   811  	AVSUBSBS
   812  	AVSUBSHS
   813  	AVSUBSWS
   814  	AVSUBE
   815  	AVSUBEUQM
   816  	AVSUBECUQ
   817  	AVMULESB
   818  	AVMULOSB
   819  	AVMULEUB
   820  	AVMULOUB
   821  	AVMULESH
   822  	AVMULOSH
   823  	AVMULEUH
   824  	AVMULOUH
   825  	AVMULESW
   826  	AVMULOSW
   827  	AVMULEUW
   828  	AVMULOUW
   829  	AVMULUWM
   830  	AVPMSUM
   831  	AVPMSUMB
   832  	AVPMSUMH
   833  	AVPMSUMW
   834  	AVPMSUMD
   835  	AVMSUMUDM
   836  	AVR
   837  	AVRLB
   838  	AVRLH
   839  	AVRLW
   840  	AVRLD
   841  	AVS
   842  	AVSLB
   843  	AVSLH
   844  	AVSLW
   845  	AVSL
   846  	AVSLO
   847  	AVSRB
   848  	AVSRH
   849  	AVSRW
   850  	AVSR
   851  	AVSRO
   852  	AVSLD
   853  	AVSRD
   854  	AVSA
   855  	AVSRAB
   856  	AVSRAH
   857  	AVSRAW
   858  	AVSRAD
   859  	AVSOI
   860  	AVSLDOI
   861  	AVCLZ
   862  	AVCLZB
   863  	AVCLZH
   864  	AVCLZW
   865  	AVCLZD
   866  	AVPOPCNT
   867  	AVPOPCNTB
   868  	AVPOPCNTH
   869  	AVPOPCNTW
   870  	AVPOPCNTD
   871  	AVCMPEQ
   872  	AVCMPEQUB
   873  	AVCMPEQUBCC
   874  	AVCMPEQUH
   875  	AVCMPEQUHCC
   876  	AVCMPEQUW
   877  	AVCMPEQUWCC
   878  	AVCMPEQUD
   879  	AVCMPEQUDCC
   880  	AVCMPGT
   881  	AVCMPGTUB
   882  	AVCMPGTUBCC
   883  	AVCMPGTUH
   884  	AVCMPGTUHCC
   885  	AVCMPGTUW
   886  	AVCMPGTUWCC
   887  	AVCMPGTUD
   888  	AVCMPGTUDCC
   889  	AVCMPGTSB
   890  	AVCMPGTSBCC
   891  	AVCMPGTSH
   892  	AVCMPGTSHCC
   893  	AVCMPGTSW
   894  	AVCMPGTSWCC
   895  	AVCMPGTSD
   896  	AVCMPGTSDCC
   897  	AVCMPNEZB
   898  	AVCMPNEZBCC
   899  	AVCMPNEB
   900  	AVCMPNEBCC
   901  	AVCMPNEH
   902  	AVCMPNEHCC
   903  	AVCMPNEW
   904  	AVCMPNEWCC
   905  	AVPERM
   906  	AVPERMXOR
   907  	AVPERMR
   908  	AVBPERMQ
   909  	AVBPERMD
   910  	AVSEL
   911  	AVSPLT
   912  	AVSPLTB
   913  	AVSPLTH
   914  	AVSPLTW
   915  	AVSPLTI
   916  	AVSPLTISB
   917  	AVSPLTISH
   918  	AVSPLTISW
   919  	AVCIPH
   920  	AVCIPHER
   921  	AVCIPHERLAST
   922  	AVNCIPH
   923  	AVNCIPHER
   924  	AVNCIPHERLAST
   925  	AVSBOX
   926  	AVSHASIGMA
   927  	AVSHASIGMAW
   928  	AVSHASIGMAD
   929  	AVMRGEW
   930  	AVMRGOW
   931  
   932  	/* VSX */
   933  	ALXV
   934  	ALXVL
   935  	ALXVLL
   936  	ALXVD2X
   937  	ALXVW4X
   938  	ALXVH8X
   939  	ALXVB16X
   940  	ALXVX
   941  	ALXVDSX
   942  	ASTXV
   943  	ASTXVL
   944  	ASTXVLL
   945  	ASTXVD2X
   946  	ASTXVW4X
   947  	ASTXVH8X
   948  	ASTXVB16X
   949  	ASTXVX
   950  	ALXSDX
   951  	ASTXSDX
   952  	ALXSIWAX
   953  	ALXSIWZX
   954  	ASTXSIWX
   955  	AMFVSRD
   956  	AMFFPRD
   957  	AMFVRD
   958  	AMFVSRWZ
   959  	AMFVSRLD
   960  	AMTVSRD
   961  	AMTFPRD
   962  	AMTVRD
   963  	AMTVSRWA
   964  	AMTVSRWZ
   965  	AMTVSRDD
   966  	AMTVSRWS
   967  	AXXLAND
   968  	AXXLANDC
   969  	AXXLEQV
   970  	AXXLNAND
   971  	AXXLOR
   972  	AXXLORC
   973  	AXXLNOR
   974  	AXXLORQ
   975  	AXXLXOR
   976  	AXXSEL
   977  	AXXMRGHW
   978  	AXXMRGLW
   979  	AXXSPLT
   980  	AXXSPLTW
   981  	AXXSPLTIB
   982  	AXXPERM
   983  	AXXPERMDI
   984  	AXXSLDWI
   985  	AXXBRQ
   986  	AXXBRD
   987  	AXXBRW
   988  	AXXBRH
   989  	AXSCVDPSP
   990  	AXSCVSPDP
   991  	AXSCVDPSPN
   992  	AXSCVSPDPN
   993  	AXVCVDPSP
   994  	AXVCVSPDP
   995  	AXSCVDPSXDS
   996  	AXSCVDPSXWS
   997  	AXSCVDPUXDS
   998  	AXSCVDPUXWS
   999  	AXSCVSXDDP
  1000  	AXSCVUXDDP
  1001  	AXSCVSXDSP
  1002  	AXSCVUXDSP
  1003  	AXVCVDPSXDS
  1004  	AXVCVDPSXWS
  1005  	AXVCVDPUXDS
  1006  	AXVCVDPUXWS
  1007  	AXVCVSPSXDS
  1008  	AXVCVSPSXWS
  1009  	AXVCVSPUXDS
  1010  	AXVCVSPUXWS
  1011  	AXVCVSXDDP
  1012  	AXVCVSXWDP
  1013  	AXVCVUXDDP
  1014  	AXVCVUXWDP
  1015  	AXVCVSXDSP
  1016  	AXVCVSXWSP
  1017  	AXVCVUXDSP
  1018  	AXVCVUXWSP
  1019  
  1020  	ALAST
  1021  
  1022  	// aliases
  1023  	ABR = obj.AJMP
  1024  	ABL = obj.ACALL
  1025  )
  1026
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